Elektronik devrelerin evrimsel algoritmalarla tasarımı
Loading...
Date
2007
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
Hatay Mustafa Kemal Üniversitesi
Access Rights
info:eu-repo/semantics/openAccess
Abstract
Bu tezde, Evrimleşebilen Donanım (Evolvable HardWare-EHW) konusunun harici uygulamaları için geliştirilen Genetik Algoritma (GA) ile, ardışık lojik devre tasarımı ve optimizasyonu amaçlanmıştır. Bu amaçla geliştirilen programda tasarlanması istenen devreye ait durum tablosundan yararlanarak, devreye uygulanan girişler, hafıza elemanlarındaki durum değişiklikleri ve devre çıkışına olan lojik etkisi gibi ardışık lojik devrelerin tasarımı için gereken veriler GA'ya aktarılmıştır. Bu veriler doğrultusunda GA, belli bir sayıda çözüm topluluğuna genetik operatörleri sırasıyla uygulayarak belli bir sonlandırma kriterine göre işleyişi tamamlamıştır. Elde edilen çözümler elektronik simülasyon programında denenerek sağlamaları yapılmıştır. Deneyler için seçilen devrelerin bir kısmında istenen fonksiyon %100'ü sağlanırken, bir kısmında yaklaşık sonuçlar elde edilmiştir. 1 girişli 2 durumlu ve 2 girişli 2 durumlu ardışık lojik devre tasarımlarında durum tablosu %100 başarı ile elde edilirken, 4 girişli 2 durumlu ardışık lojik devre tasarımı için standart GA ile %82.8'lik başarı elde edilmiştir. Bu başarı oranını arttırma amacıyla, adaptif mutasyon, tufan etkisi ve devre yoğunlaşma gibi soruna özel yaklaşımlar kullanılarak başarı oranında yaklaşık %5'lik bir artış sağlanmıştır. Ayrıca GA tarafından tasarlanan devrelerde, klasik tasarımdan farklı sonuçlar elde edilmiş ve tasarlanan devrelerdeki kapı sayısının azaldığı gözlenmiştir. 2007, 89 Sayfa
The aim of this study is to obtain sequential logic circuit design and its optimisation via Genetic Algorithm (GA) which is developed for extrinsic Evolvable HardWare (EHW) application. Firstly via statement table or statement diagrams of circuit that should be designed, necessary data like statement changing that is occured while passing from previous statement through following statement in memory elements, applied inputs to the circuits and effects of these changings to the output of circuit, to design cascade circuit were transferred to GA. Thanks to these data, GA might constitute a certain number of solution classes that have gene number and via appliying genetic operators to this solution classes respectively, according to a certain conclusion criteria and/or generation number, operation of GA was concluded. Obtained solutions and truth of electronic circuit were shown with drawings after trying in simulation program. Although in this study some of acquired circuits obtained the desired circuits, some of them obtained approximately results. In design of sequential logic circuits which have 1 input 2 states and 2 inputs 2 states, statement table was obtained with rate of 100 %. But in design of sequential logic circuits which have 4 inputs 2 states, traditional GA obtained the statement table with rate of 82.8 %. To increase the rate of success a few approaches were used such as adaptive mutation, cataclysm effect and intensify to part of combinational circuit. Success rate of obtaining the statement table was increased approximately 5 % with these approaches. In some circuits which are desired to design by GA obtained different results when compared with conventional design. In some of designs were reduced the number of logic gates. 2007, 89 Pages
The aim of this study is to obtain sequential logic circuit design and its optimisation via Genetic Algorithm (GA) which is developed for extrinsic Evolvable HardWare (EHW) application. Firstly via statement table or statement diagrams of circuit that should be designed, necessary data like statement changing that is occured while passing from previous statement through following statement in memory elements, applied inputs to the circuits and effects of these changings to the output of circuit, to design cascade circuit were transferred to GA. Thanks to these data, GA might constitute a certain number of solution classes that have gene number and via appliying genetic operators to this solution classes respectively, according to a certain conclusion criteria and/or generation number, operation of GA was concluded. Obtained solutions and truth of electronic circuit were shown with drawings after trying in simulation program. Although in this study some of acquired circuits obtained the desired circuits, some of them obtained approximately results. In design of sequential logic circuits which have 1 input 2 states and 2 inputs 2 states, statement table was obtained with rate of 100 %. But in design of sequential logic circuits which have 4 inputs 2 states, traditional GA obtained the statement table with rate of 82.8 %. To increase the rate of success a few approaches were used such as adaptive mutation, cataclysm effect and intensify to part of combinational circuit. Success rate of obtaining the statement table was increased approximately 5 % with these approaches. In some circuits which are desired to design by GA obtained different results when compared with conventional design. In some of designs were reduced the number of logic gates. 2007, 89 Pages
Description
Keywords
Elektrik ve Elektronik Mühendisliği, Electrical and Electronics Engineering, Ardışık lojik devre tasarımı, Genetik algoritma, Evrimleşebilen donanımlar, Sequential circuit design, Genetic algorithms, Evolvable hardware.
